Digital Signal Processing Using Field Programmable Gate Arrays

This paper presents an introduction to digital hardware design using Field Programmable Gate Arrays (FPGAs). After a historical introduction and a quick overview of digital design, the internal structure of a generic FPGA is discussed. Then we describe the design flow, i.e. the steps needed to go from design idea to actual working hardware. Digital signal processing is an important area where FPGAs have found many applications in recent years. Therefore a complete chapter is devoted to this subject. The paper finishes with a discussion of important peripheral concepts which are essential for success in any project involving FPGAs. HISTORICAL INTRODUCTION Digital electronics is concerned with circuits which represent information using a finite set of output states [1]. Most of the applications use in fact just two states, which are often labeled ‘0’ and ‘1’. Behind this choice is the fact that the whole Boolean formalism becomes then available for the solution of logic problems, and also that arithmetic using binary representations of numbers is a very mature field. Different mappings between the two states and the corresponding output voltages or currents define different logic families. For example, the Transistor-Transistor Logic (TTL) family defines an output as logic ‘1’ if its voltage is above a certain threshold (typically 2.4 V). For the same family, if we set the input threshold for logic ‘1’ as 2 V, we will have a margin of 0.4 V which will allow us to interconnect TTL chips inside a design without the risk of misinterpretation of logic states. This complete preservation of information even in the presence of moderate amounts of noise is what has driven a steady shift of paradigm from analogue to digital in many applications. Here we see as well another reason for the choice of binary logic: from a purely electrical point of view, having only two different values for the voltages or currents used to represent states is the safest choice in terms of design margins. Historically, TTL chips from the 74 series fuelled an initial wave of digital system designs in the 1970s. From this seed, we will focus on the separate branches that evolved to satisfy the demand for programmability of different logic functions. By programmability, we mean the ability of a designer to affect the logic behavior of a chip after it has been produced in the factory. A first improvement in the direction of programmability came with the introduction of Gate Arrays, which were nothing else than a chip filled with NAND gates that the designer could interconnect as needed to generate any logic function he desired. This interconnection had to happen at the chip design stage, i.e. before production, but it was already a convenient improvement over designing everything from scratch. We have to wait until the introduction of Programmable Logic Arrays (PLAs) in the 1980s to have a really programmable solution. These were two-level AND-OR structures with user-programmable connections. Programmable Array Logic (PAL) devices were an improvement in performance and cost over the PLA structure. Today, these devices are collectively called Programmable Logic Devices (PLDs). The next stage in sophistication resulted in Complex PLDs (CPLDs), which were nothing else than a collection of multiple PLDs with programmable interconnections. FPGAs, in turn, contain a much larger number of simpler blocks with the attendant increase in interconnect logic, which in fact dominates the entire chip. BASICS OF DIGITAL DESIGN A typical logic design inside an FPGA is made of combinatorial logic blocks sandwiched in between arrays of flip-flops, as depicted in Fig. 1. A combinatorial block is any digital sub-circuit in which the current state of the outputs only depends, within the electrical propagation time, on the current state of the inputs. To this group belong all the well known basic logic functions such as the two-input AND, OR and any combination of them. It should be noted, that logic functions of arbitrary complexity can be derived from these basic blocks. Multiplexers, encoders and decoders are all examples of combinatorial blocks. The input in Fig. 1 might be made of many bits. The circuit is also supplied with a clock, which is a simple square wave oscillating at a certain fixed frequency. The two flip-flops in the circuit, which might be flip-flop blocks in the case of a multi-bit input, are fed with the same clock and propagate the signals from their D inputs to their Q outputs every time there is a rising edge in the clock signal. Apart from that very specific instant in time, D is disconnected from Q. Fig. 1: A typical digital design The structure of the circuit is thus very simple, and its application as a template covers the vast majority of digital design requirements in standard applications, such THTTT01 Proceedings of BIW08, Tahoe City, California